REU SITE: WAVE SURF: Workforce Advancement in Verification and Emulation of Semiconductor Chips -- Undergraduate Research Fellowships

NSF Award Search · 01002627DB NSF RESEARCH & RELATED ACTIVIT · $480,300 · view on nsf.gov ↗

Abstract

Semiconductor chips power nearly every aspect of modern life, from smartphones and medical devices to national defense systems and critical infrastructure. As these chips grow more complex, verifying that they function correctly and securely has become one of the most costly and time-consuming stages of development. At the same time, the United States faces a critical shortage of engineers trained in chip verification, a gap that threatens both economic competitiveness and national security. This project establishes a Research Experiences for Undergraduates (REU) Site at Texas A&M University to train the next generation of verification engineers and semiconductor researchers. Each summer, ten undergraduate students will participate in a ten-week immersive research program focused on chip verification and the application of artificial intelligence (AI) to semiconductor design evaluation. The project specifically targets students from community colleges, regional universities, and institutions with limited research infrastructure, with emphasis on first-generation college students, veterans, and students with no prior research experience. Participants will receive layered mentorship from faculty, graduate students, and industry professionals, along with professional development training in scientific communication, ethics, and career readiness. Industry partners will contribute guest lectures, mentorship, and site visits, connecting students directly to career pathways in the semiconductor workforce. By combining cutting-edge research training with inclusive recruitment and sustained post-program engagement, this project addresses a pressing national workforce need while broadening participation in a strategically vital field. This project engages undergraduate researchers in four interconnected themes spanning hardware security, performance analysis, design automation, and functional verification. The first theme develops scalable security verification frameworks

Key facts

NSF award ID
2548388
Awardee
Texas A&M Engineering Experiment Station (TX)
SAM.gov UEI
QD1MX6N5YTN4
PI
Jiang Hu
Primary program
01002627DB NSF RESEARCH & RELATED ACTIVIT
All programs
Microelectronics and Semiconductors, REU SITE-Res Exp for Ugrd Site
Estimated total
$480,300
Funds obligated
$480,300
Transaction type
Standard Grant
Period
10/01/2026 → 09/30/2029